nnicolosi/Raptor
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

finally fast googlenet with correct latency artifacts for fair comparison
Validate Operations / validate-operations (push) Has been cancelled
Details

Browse Source
This commit is contained in:
NiccoloN
2026-07-29 18:20:44 +02:00
parent 060a21172e
commit 1b4f070bef
74 changed files with 2773 additions and 1311 deletions
Download Patch File Download Diff File Expand all files Collapse all files
backend-simulators/pim/pim-simulator/tests/placeholder.rs
+20 -1
View File
@@ -25,7 +25,7 @@ fn wrong_size_place_holder() {
vvadd,
idata_build
.set_rdr1r2(3, 1, 2)
.set_imm_len(8 * size_of::<f32>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];
@@ -33,6 +33,25 @@ fn wrong_size_place_holder() {
executable.execute();
}
#[test]
#[should_panic(expected = "Function not found for the requested size input:8 output:8")]
fn unsupported_8_bit_vectors_do_not_alias_f32() {
let mut inst_builder = InstructionsBuilder::new();
let mut idata_build = InstructionDataBuilder::new();
idata_build.set_core_indx(0).fix_core_indx();
inst_builder.make_inst(
setbw,
idata_build.set_ibiw_obiw(8, 8).build(),
);
inst_builder.make_inst(
vvadd,
idata_build
.set_rdr1r2(3, 1, 2)
.set_imm_len(8)
.build(),
);
}
fn place_holder(inst : InstructionType) {
backend-simulators/pim/pim-simulator/tests/simd.rs
+9 -9
View File
@@ -55,7 +55,7 @@ where
vvadd,
idata_build
.set_rdr1r2(3, 1, 2)
.set_imm_len(8 * size_of::<F>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];
@@ -159,7 +159,7 @@ where
vvsub,
idata_build
.set_rdr1r2(3, 1, 2)
.set_imm_len(8 * size_of::<F>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];
@@ -263,7 +263,7 @@ where
vvmul,
idata_build
.set_rdr1r2(3, 1, 2)
.set_imm_len(8 * size_of::<F>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];
@@ -367,7 +367,7 @@ where
vvdmul,
idata_build
.set_rdr1r2(3, 1, 2)
.set_imm_len(8 * size_of::<F>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];
@@ -464,7 +464,7 @@ where
vvmax,
idata_build
.set_rdr1r2(3, 1, 2)
.set_imm_len(8 * size_of::<F>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];
@@ -565,7 +565,7 @@ where
idata_build
.set_rdr1r2(3, 1, 1)
.set_offset_select(1)
.set_imm_len(8 * size_of::<F>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];
@@ -658,7 +658,7 @@ where
vrelu,
idata_build
.set_rdr1r2(3, 1, 1)
.set_imm_len(8 * size_of::<F>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];
@@ -758,7 +758,7 @@ where
vtanh,
idata_build
.set_rdr1r2(3, 1, 1)
.set_imm_len(8 * size_of::<F>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];
@@ -860,7 +860,7 @@ where
vsigm,
idata_build
.set_rdr1r2(3, 1, 1)
.set_imm_len(8 * size_of::<F>() as i32)
.set_imm_len(8)
.build(),
);
let core_instruction = vec![inst_builder.build().into()];