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Merge remote-tracking branch 'origin/main'

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NiccoloN
2026-03-06 15:44:30 +01:00
parent 7202a4317d d4efa64b96
commit 825188cc89
4 changed files with 28 additions and 4 deletions
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1
backend-simulators/pim/pim-simulator/src/lib/instruction_set/isa.rs
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@@ -700,6 +700,7 @@ pub fn lmv(cores: &mut CPU, data: InstructionData) -> Result<InstructionStatus>
let local_memory = core.load::<u8>(r1_val, imm_len)?; let local_memory = core.load::<u8>(r1_val, imm_len)?;
let tmp = local_memory[0].to_vec(); let tmp = local_memory[0].to_vec();
core.execute_store(rd_val, tmp.as_slice()); core.execute_store(rd_val, tmp.as_slice());
TRACER.lock().unwrap().post_lmv(cores, data);
Ok(InstructionStatus::Completed) Ok(InstructionStatus::Completed)
} }

4
backend-simulators/pim/pim-simulator/src/lib/instruction_set/mod.rs
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@@ -46,6 +46,10 @@ impl Instruction {
.with_context(|| format!("Error in core: {}", self.data.core_indx() - 1)) .with_context(|| format!("Error in core: {}", self.data.core_indx() - 1))
.unwrap() .unwrap()
} }
pub(crate) fn dump(&self) {
eprintln!("\t{}", functor_to_name(self.functor as usize));
}
} }
pub type Instructions = Vec<Instruction>; pub type Instructions = Vec<Instruction>;

15
backend-simulators/pim/pim-simulator/src/lib/json_to_instruction/json_isa.rs
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@@ -71,18 +71,27 @@ pub fn json_to_instruction(
inst_builder, inst_builder,
inst_data_builder, inst_data_builder,
json, json,
); )
.unwrap();
} }
macro_rules! json_str { macro_rules! json_str {
($json:ident , $value:literal) => { ($json:ident , $value:literal) => {
$json.get($value).context(concat![$value, " field not present"])?.as_str().context(concat![$value, " field not str"])? $json
.get($value)
.context(concat![$value, " field not present"])?
.as_str()
.context(concat![$value, " field not str"])?
}; };
} }
macro_rules! json_i64 { macro_rules! json_i64 {
($json:ident , $value:literal) => { ($json:ident , $value:literal) => {
$json.get($value).context(concat![$value, " field not present"])?.as_i64().context(concat![$value, " field not i64"])? $json
.get($value)
.context(concat![$value, " field not present"])?
.as_i64()
.context(concat![$value, " field not i64"])?
}; };
} }

12
backend-simulators/pim/pim-simulator/src/lib/pimcore.rs
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@@ -1,7 +1,7 @@
#![allow(unused)] #![allow(unused)]
use crate::{ use crate::{
cpu::CPU, instruction_set::{Instruction, InstructionStatus, Instructions}, memory_manager::type_traits::TryToUsize, send_recv::{SendRecv, handle_send_recv}, tracing::TRACER cpu::CPU, instruction_set::{Instruction, InstructionStatus, Instructions, isa::functor_to_name}, memory_manager::type_traits::TryToUsize, send_recv::{SendRecv, handle_send_recv}, tracing::TRACER
}; };
pub mod cpu; pub mod cpu;
pub mod instruction_set; pub mod instruction_set;
@@ -131,6 +131,16 @@ impl Executable {
pub fn cpu_mut(&mut self) -> &mut CPU { pub fn cpu_mut(&mut self) -> &mut CPU {
&mut self.cpu &mut self.cpu
} }
pub fn dump(&self) {
let core_instructions = &self.core_instructions;
for (i, core_instruction) in core_instructions.iter().enumerate() {
eprintln!("INST OF CORE {}:", i);
for inst in &core_instruction.instructions {
inst.dump();
}
}
}
} }
fn handle_wait_sync(cpu: &mut CPU, core_instructions: &mut [CoreInstruction], core_result: InstructionStatus) { fn handle_wait_sync(cpu: &mut CPU, core_instructions: &mut [CoreInstruction], core_result: InstructionStatus) {