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@@ -1,5 +1,6 @@
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#include "mlir/Dialect/Affine/IR/AffineOps.h"
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/SCF/IR/SCF.h"
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#include "mlir/Dialect/Tensor/IR/Tensor.h"
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#include "mlir/IR/AffineExpr.h"
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#include "mlir/IR/Block.h"
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@@ -59,6 +60,21 @@ static LogicalResult verifyStaticWeights(ComputeOpTy computeOp, StringRef kind)
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return success();
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}
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static bool isStaticScfForInductionVar(Value value) {
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auto blockArg = dyn_cast<BlockArgument>(value);
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if (!blockArg)
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return false;
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auto loop = dyn_cast_or_null<scf::ForOp>(blockArg.getOwner()->getParentOp());
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if (!loop || loop.getInductionVar() != value)
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return false;
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std::optional<int64_t> lowerBound = matchConstantIndexValue(loop.getLowerBound());
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std::optional<int64_t> upperBound = matchConstantIndexValue(loop.getUpperBound());
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std::optional<int64_t> step = matchConstantIndexValue(loop.getStep());
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return lowerBound && upperBound && step && *step > 0 && *upperBound >= *lowerBound;
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}
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static bool isStaticIndexExpr(Value value) {
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if (matchConstantIndexValue(value))
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return true;
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@@ -80,7 +96,7 @@ static bool isStaticIndexExpr(Value value) {
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}
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static bool isSupportedLaneOffsetExpr(Value value, BlockArgument laneArg) {
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if (value == laneArg || isStaticIndexExpr(value))
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if (value == laneArg || isStaticIndexExpr(value) || isStaticScfForInductionVar(value))
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return true;
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auto affineApply = value.getDefiningOp<affine::AffineApplyOp>();
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@@ -436,6 +452,39 @@ LogicalResult SpatReluPlanOp::verify() {
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return success();
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}
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LogicalResult SpatBiasAddPlanOp::verify() {
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if (failed(verifyPlanTensorTypes(getOperation(), getInput(), getOutput(), "spat.bias_add_plan")))
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return failure();
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if (!isKnownLogicalLayout(getLogicalLayout()))
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return emitError("requires a known logical layout");
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auto inputType = dyn_cast<RankedTensorType>(getInput().getType());
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auto biasType = dyn_cast<RankedTensorType>(getBias().getType());
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auto outputType = dyn_cast<RankedTensorType>(getOutput().getType());
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if (!inputType || !biasType || !outputType)
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return emitError("requires ranked tensor input, bias, and output");
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if (!inputType.hasStaticShape() || !biasType.hasStaticShape() || !outputType.hasStaticShape())
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return emitError("requires static tensor input, bias, and output");
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if (inputType != outputType)
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return emitError("requires matching input and output tensor types");
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if (outputType.getRank() != 4)
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return emitError("requires rank-4 input/output tensors");
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if (getLogicalLayout() != "nchw")
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return emitError("requires logical layout \"nchw\"");
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if (biasType.getElementType() != outputType.getElementType())
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return emitError("requires bias element type to match the output element type");
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ArrayRef<int64_t> biasShape = biasType.getShape();
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const int64_t channels = outputType.getDimSize(1);
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const bool supported = biasShape.empty() || (biasShape.size() == 1 && biasShape[0] == channels)
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|| (biasShape.size() == 2 && biasShape[0] == 1 && biasShape[1] == channels)
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|| (biasShape.size() == 4 && biasShape[0] == 1 && biasShape[1] == channels
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&& biasShape[2] == 1 && biasShape[3] == 1);
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if (!supported)
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return emitError("requires scalar or per-channel bias broadcastable over NCHW");
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return success();
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}
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LogicalResult SpatBlueprintOp::verify() {
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auto modeAttr = getModeAttr();
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bool isFragmentAssembly = modeAttr && modeAttr.getValue() == "fragment_assembly";
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