diff --git a/backend-simulators/pim/pim-simulator/Cargo.toml b/backend-simulators/pim/pim-simulator/Cargo.toml index ff51ef6..7e8df3a 100644 --- a/backend-simulators/pim/pim-simulator/Cargo.toml +++ b/backend-simulators/pim/pim-simulator/Cargo.toml @@ -1,4 +1,3 @@ - [package] name = "pim-simulator" version = "0.1.0" diff --git a/backend-simulators/pim/pim-simulator/src/lib/instruction_set/isa.rs b/backend-simulators/pim/pim-simulator/src/lib/instruction_set/isa.rs index 25a078e..ca84b9a 100644 --- a/backend-simulators/pim/pim-simulator/src/lib/instruction_set/isa.rs +++ b/backend-simulators/pim/pim-simulator/src/lib/instruction_set/isa.rs @@ -81,6 +81,7 @@ pub fn functor_to_name(functor: usize) -> &'static str { /////////////////////////////////////////////////////////////// /////////////////Scalar/register Instructions////////////////// /////////////////////////////////////////////////////////////// +#[inline(never)] pub fn sldi(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_sldi(cores, data); let (core_indx, rd, imm) = data.get_core_rd_imm(); @@ -90,6 +91,7 @@ pub fn sldi(cores: &mut CPU, data: InstructionData) -> Result Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn sld(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_sld(cores, data); let (core_indx, rd, r1) = data.get_core_rd_r1(); @@ -104,6 +106,7 @@ pub fn sld(cores: &mut CPU, data: InstructionData) -> Result Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn sadd(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_sadd(cores, data); let (core_indx, rd, r1, r2) = data.get_core_rd_r1_r2(); @@ -114,6 +117,7 @@ pub fn sadd(cores: &mut CPU, data: InstructionData) -> Result Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn ssub(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_ssub(cores, data); let (core_indx, rd, r1, r2) = data.get_core_rd_r1_r2(); @@ -124,6 +128,7 @@ pub fn ssub(cores: &mut CPU, data: InstructionData) -> Result Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn smul(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_smul(cores, data); let (core_indx, rd, r1, r2) = data.get_core_rd_r1_r2(); @@ -134,6 +139,7 @@ pub fn smul(cores: &mut CPU, data: InstructionData) -> Result Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn saddi(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_saddi(cores, data); let (core_indx, rd, r1, imm) = data.get_core_rd_r1_imm(); @@ -143,6 +149,7 @@ pub fn saddi(cores: &mut CPU, data: InstructionData) -> Result Result { TRACER.lock().unwrap().pre_smuli(cores, data); let (core_indx, rd, r1, imm) = data.get_core_rd_r1_imm(); @@ -217,14 +224,17 @@ pub fn is_setbw(functor: InstructionType) -> bool { functor as usize == setbw as *const () as usize } +#[inline(never)] pub fn setbw(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, this instruction is resolved in the construction phase"); } +#[inline(never)] pub fn mvmul(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn mvm_impl_internal( cores: &mut CPU, data: InstructionData, @@ -309,6 +319,7 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub(super) fn mvmul_impl(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice + UpcastSlice + UpcastSlice, @@ -329,10 +340,12 @@ where } } +#[inline(never)] pub fn vvadd(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn vvadd_impl(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice, @@ -371,10 +384,12 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn vvsub(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn vvsub_impl(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice, @@ -416,6 +431,7 @@ pub fn vvmul(cores: &mut CPU, data: InstructionData) -> Result(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice, @@ -452,10 +468,12 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn vvdmul(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn vvdmul_impl(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice, @@ -488,10 +506,12 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn vvmax(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn vvmax_impl(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice, @@ -525,22 +545,26 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn vvsll(cores: &mut CPU, data: InstructionData) -> Result { panic!( "Shift left on floating point what does it means? who has generated this instruction???" ); } +#[inline(never)] pub fn vvsra(cores: &mut CPU, data: InstructionData) -> Result { panic!( "Shift right on floating point what does it means? who has generated this instruction???" ); } +#[inline(never)] pub fn vavg(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn vavg_impl(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice, @@ -570,10 +594,12 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn vrelu(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn vrelu_impl(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice, @@ -600,10 +626,12 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn vtanh(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn vtanh_impl(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice, @@ -628,10 +656,12 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn vsigm(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn vsigm_impl(cores: &mut CPU, data: InstructionData) -> Result where [F]: UpcastSlice, @@ -654,10 +684,12 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn vsoftmax(cores: &mut CPU, data: InstructionData) -> Result { panic!("You are calling a placeholder, the real call is the generic version"); } +#[inline(never)] pub(super) fn vsoftmax_impl( cores: &mut CPU, data: InstructionData, @@ -696,14 +728,17 @@ where Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn vmv(cores: &mut CPU, data: InstructionData) -> Result { todo!() } +#[inline(never)] pub fn vrsu(cores: &mut CPU, data: InstructionData) -> Result { todo!() } +#[inline(never)] pub fn vrsl(cores: &mut CPU, data: InstructionData) -> Result { todo!() } @@ -711,6 +746,7 @@ pub fn vrsl(cores: &mut CPU, data: InstructionData) -> Result /////////////////////////////////////////////////////////////// ///Communication/synchronization Instructions///////////////// /////////////////////////////////////////////////////////////// +#[inline(never)] pub fn ld(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_ld(cores, data); let (core, rd, r1, _, imm_len, offset_select, offset_value) = @@ -727,6 +763,7 @@ pub fn ld(cores: &mut CPU, data: InstructionData) -> Result { Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn st(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_st(cores, data); let (core, rd, r1, _, imm_len, offset_select, offset_value) = @@ -743,6 +780,7 @@ pub fn st(cores: &mut CPU, data: InstructionData) -> Result { Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn lldi(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_lldi(cores, data); let (core, rd, imm) = data.get_core_rd_imm(); @@ -759,6 +797,7 @@ pub fn lldi(cores: &mut CPU, data: InstructionData) -> Result Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn lmv(cores: &mut CPU, data: InstructionData) -> Result { TRACER.lock().unwrap().pre_lmv(cores, data); let (core, rd, r1, _, imm_len, offset_select, offset_value) = @@ -775,27 +814,32 @@ pub fn lmv(cores: &mut CPU, data: InstructionData) -> Result Ok(InstructionStatus::Completed) } +#[inline(never)] pub fn isa_send(functor : usize) -> bool{ (send as *const () as usize) == functor } +#[inline(never)] pub fn send(cores: &mut CPU, data: InstructionData) -> Result { Ok(InstructionStatus::Sending(data)) } +#[inline(never)] pub fn isa_recv(functor : usize) -> bool{ - println!("{} {} ", functor, (recv as *const () as usize)); (recv as *const () as usize) == functor } +#[inline(never)] pub fn recv(cores: &mut CPU, data: InstructionData) -> Result { Ok(InstructionStatus::Reciving(data)) } +#[inline(never)] pub fn wait(cores: &mut CPU, data: InstructionData) -> Result { Ok(InstructionStatus::Waiting(data)) } +#[inline(never)] pub fn sync(cores: &mut CPU, data: InstructionData) -> Result { Ok(InstructionStatus::Sync(data)) } diff --git a/backend-simulators/pim/pim-simulator/src/lib/pimcore.rs b/backend-simulators/pim/pim-simulator/src/lib/pimcore.rs index 6415092..d63c8c8 100644 --- a/backend-simulators/pim/pim-simulator/src/lib/pimcore.rs +++ b/backend-simulators/pim/pim-simulator/src/lib/pimcore.rs @@ -198,17 +198,6 @@ impl<'a> Executable<'a> { } fn check_cycle(cpu: &mut CPU, cores_instructions: &[CoreInstructions], send_recv: &mut SendRecv) { - //println!("PRINTAAA"); - //*PRINTAAA.lock().unwrap() = true; - //(inst.functor)(cpu, inst.data); - //*PRINTAAA.lock().unwrap() = false; - // - - println!("NAMES"); - for (a,n) in NAMES.iter(){ - println!("{} {}", a, n); - } - let mut i = 0; for CoreInstructions { instructions, @@ -221,7 +210,6 @@ fn check_cycle(cpu: &mut CPU, cores_instructions: &[CoreInstructions], send_recv let Instruction { data, functor } = instructions[*program_counter]; let functor_address = functor as usize; - print!("Core {} ", i); i += 1; match (isa_recv(functor_address), isa_send(functor_address)) { (true, false) => {