This commit is contained in:
@@ -1,7 +1,11 @@
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/SCF/IR/SCF.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/BuiltinOps.h"
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#include "mlir/IR/IRMapping.h"
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#include "llvm/ADT/StringRef.h"
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#include "src/Accelerators/PIM/Common/PimCommon.hpp"
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#include "src/Accelerators/PIM/Compiler/PimBatchEmission.hpp"
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@@ -24,113 +28,132 @@ static SmallVector<int32_t> getLaneChunkCoreIds(ArrayRef<int32_t> coreIds, size_
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return laneCoreIds;
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}
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static void scalarizeBatchOpsInCore(pim::PimCoreOp scalarCore, size_t laneCount, unsigned lane) {
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IRRewriter rewriter(scalarCore.getContext());
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SmallVector<Operation*> batchOps;
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scalarCore.walk([&](Operation* op) {
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if (isa<pim::PimSendBatchOp,
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pim::PimSendTensorBatchOp,
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pim::PimReceiveBatchOp,
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pim::PimReceiveTensorBatchOp,
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pim::PimMemCopyHostToDevBatchOp>(op)) {
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batchOps.push_back(op);
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}
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});
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static void cloneScalarizedLaneBody(OpBuilder& builder,
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pim::PimCoreBatchOp coreBatchOp,
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unsigned lane,
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OperationFolder& constantFolder) {
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Block& oldBlock = coreBatchOp.getBody().front();
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size_t laneCount = static_cast<size_t>(coreBatchOp.getLaneCount());
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size_t weightCount = coreBatchOp.getWeights().size();
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for (Operation* op : batchOps) {
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rewriter.setInsertionPoint(op);
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IRMapping mapper;
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for (auto [argIndex, blockArg] : llvm::enumerate(oldBlock.getArguments())) {
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if (blockArg.getType().isIndex()) {
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mapper.map(blockArg, getOrCreateHostIndexConstant(coreBatchOp, static_cast<int64_t>(lane), constantFolder));
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continue;
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}
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if (argIndex <= weightCount) {
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mapper.map(blockArg, coreBatchOp.getWeights()[argIndex - 1]);
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continue;
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}
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size_t inputIndex = argIndex - 1 - weightCount;
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assert(inputIndex < coreBatchOp.getInputs().size() && "pim.core_batch block input index out of range");
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mapper.map(blockArg, coreBatchOp.getInputs()[inputIndex]);
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}
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for (Operation& op : oldBlock) {
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if (isa<pim::PimHaltOp>(op))
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continue;
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if (auto sendBatchOp = dyn_cast<pim::PimSendBatchOp>(op)) {
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pim::PimSendOp::create(rewriter,
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sendBatchOp.getLoc(),
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sendBatchOp.getInput(),
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sendBatchOp.getSizeAttr(),
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rewriter.getI32IntegerAttr(sendBatchOp.getTargetCoreIds()[lane]));
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rewriter.eraseOp(op);
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Operation* anchorOp = builder.getInsertionBlock()->getParentOp();
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pim::PimSendOp::create(
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builder,
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sendBatchOp.getLoc(),
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mapper.lookup(sendBatchOp.getInput()),
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sendBatchOp.getSizeAttr(),
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getOrCreateHostIndexConstant(anchorOp, sendBatchOp.getTargetCoreIds()[lane], constantFolder));
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continue;
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}
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if (auto sendTensorBatchOp = dyn_cast<pim::PimSendTensorBatchOp>(op)) {
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pim::PimSendTensorOp::create(
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rewriter,
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builder,
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sendTensorBatchOp.getLoc(),
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sendTensorBatchOp.getInput(),
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rewriter.getDenseI32ArrayAttr(getLaneChunkCoreIds(sendTensorBatchOp.getTargetCoreIds(), laneCount, lane)));
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rewriter.eraseOp(op);
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mapper.lookup(sendTensorBatchOp.getInput()),
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builder.getDenseI32ArrayAttr(getLaneChunkCoreIds(sendTensorBatchOp.getTargetCoreIds(), laneCount, lane)));
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continue;
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}
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if (auto receiveBatchOp = dyn_cast<pim::PimReceiveBatchOp>(op)) {
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auto scalarReceive =
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pim::PimReceiveOp::create(rewriter,
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receiveBatchOp.getLoc(),
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receiveBatchOp.getOutput().getType(),
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receiveBatchOp.getOutputBuffer(),
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receiveBatchOp.getSizeAttr(),
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rewriter.getI32IntegerAttr(receiveBatchOp.getSourceCoreIds()[lane]));
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rewriter.replaceOp(op, scalarReceive->getResults());
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Operation* anchorOp = builder.getInsertionBlock()->getParentOp();
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auto scalarReceive = pim::PimReceiveOp::create(
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builder,
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receiveBatchOp.getLoc(),
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receiveBatchOp.getOutput().getType(),
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mapper.lookup(receiveBatchOp.getOutputBuffer()),
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receiveBatchOp.getSizeAttr(),
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getOrCreateHostIndexConstant(anchorOp, receiveBatchOp.getSourceCoreIds()[lane], constantFolder));
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mapper.map(receiveBatchOp.getOutput(), scalarReceive.getOutput());
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continue;
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}
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if (auto receiveTensorBatchOp = dyn_cast<pim::PimReceiveTensorBatchOp>(op)) {
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auto scalarReceive = pim::PimReceiveTensorOp::create(
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rewriter,
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builder,
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receiveTensorBatchOp.getLoc(),
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receiveTensorBatchOp.getOutput().getType(),
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receiveTensorBatchOp.getOutputBuffer(),
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rewriter.getDenseI32ArrayAttr(getLaneChunkCoreIds(receiveTensorBatchOp.getSourceCoreIds(), laneCount, lane)));
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rewriter.replaceOp(op, scalarReceive->getResults());
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mapper.lookup(receiveTensorBatchOp.getOutputBuffer()),
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builder.getDenseI32ArrayAttr(getLaneChunkCoreIds(receiveTensorBatchOp.getSourceCoreIds(), laneCount, lane)));
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mapper.map(receiveTensorBatchOp.getOutput(), scalarReceive.getOutput());
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continue;
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}
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auto memcpBatchOp = cast<pim::PimMemCopyHostToDevBatchOp>(op);
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auto scalarCopy = pim::PimMemCopyHostToDevOp::create(rewriter,
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memcpBatchOp.getLoc(),
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memcpBatchOp.getOutput().getType(),
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memcpBatchOp.getDeviceTarget(),
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memcpBatchOp.getHostSource(),
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memcpBatchOp.getDeviceTargetOffsetAttr(),
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memcpBatchOp.getHostSourceOffsetAttr(),
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memcpBatchOp.getSizeAttr());
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rewriter.replaceOp(op, scalarCopy->getResults());
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if (auto memcpBatchOp = dyn_cast<pim::PimMemCopyHostToDevBatchOp>(op)) {
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auto scalarCopy = pim::PimMemCopyHostToDevOp::create(
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builder,
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memcpBatchOp.getLoc(),
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memcpBatchOp.getOutput().getType(),
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getOrCreateHostIndexConstant(coreBatchOp, memcpBatchOp.getDeviceTargetOffset(), constantFolder),
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getOrCreateHostIndexConstant(coreBatchOp, memcpBatchOp.getHostSourceOffset(), constantFolder),
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mapper.lookup(memcpBatchOp.getDeviceTarget()),
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mapper.lookup(memcpBatchOp.getHostSource()),
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memcpBatchOp.getSizeAttr());
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mapper.map(memcpBatchOp.getOutput(), scalarCopy.getOutput());
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continue;
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}
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Operation* cloned = builder.clone(op, mapper);
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for (auto [originalResult, clonedResult] : llvm::zip(op.getResults(), cloned->getResults()))
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mapper.map(originalResult, clonedResult);
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}
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}
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} // namespace
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LogicalResult withScalarCoreFromBatchLane(pim::PimCoreBatchOp coreBatchOp,
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unsigned lane,
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llvm::function_ref<LogicalResult(pim::PimCoreOp)> callback) {
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LogicalResult withScalarCoreFromBatchLanes(pim::PimCoreBatchOp coreBatchOp,
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ArrayRef<unsigned> lanes,
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llvm::function_ref<LogicalResult(pim::PimCoreOp)> callback) {
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assert(!lanes.empty() && "expected at least one batch lane");
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OwningOpRef<ModuleOp> scratchModule = ModuleOp::create(coreBatchOp.getLoc());
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OpBuilder builder(scratchModule->getContext());
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OperationFolder constantFolder(scratchModule->getContext());
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builder.setInsertionPointToStart(scratchModule->getBody());
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size_t laneCount = static_cast<size_t>(coreBatchOp.getLaneCount());
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size_t weightsPerLane = coreBatchOp.getWeights().size() / laneCount;
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SmallVector<Value> laneWeights;
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laneWeights.reserve(weightsPerLane);
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for (size_t weightIndex = 0; weightIndex < weightsPerLane; ++weightIndex)
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laneWeights.push_back(coreBatchOp.getWeights()[lane * weightsPerLane + weightIndex]);
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SmallVector<Value> weights(coreBatchOp.getWeights().begin(), coreBatchOp.getWeights().end());
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auto coreIds = getBatchCoreIds(coreBatchOp);
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auto scalarCore = pim::PimCoreOp::create(
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builder, coreBatchOp.getLoc(), ValueRange(laneWeights), builder.getI32IntegerAttr(coreIds[lane]));
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int32_t coreId = coreIds[lanes.front()];
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for (unsigned lane : lanes)
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assert(coreIds[lane] == coreId && "all grouped lanes must target the same core");
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auto scalarCore =
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pim::PimCoreOp::create(builder, coreBatchOp.getLoc(), ValueRange(weights), builder.getI32IntegerAttr(coreId));
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Block* block = builder.createBlock(&scalarCore.getBody(), scalarCore.getBody().end());
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IRMapping mapper;
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if (coreBatchOp.getBody().front().getNumArguments() == 1)
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mapper.map(coreBatchOp.getBody().front().getArgument(0), coreBatchOp.getInputs()[lane]);
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builder.setInsertionPointToEnd(block);
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for (Operation& op : coreBatchOp.getBody().front()) {
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Operation* cloned = builder.clone(op, mapper);
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for (auto [originalResult, clonedResult] : llvm::zip(op.getResults(), cloned->getResults()))
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mapper.map(originalResult, clonedResult);
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}
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for (unsigned lane : lanes)
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cloneScalarizedLaneBody(builder, coreBatchOp, lane, constantFolder);
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if (block->empty() || !isa<pim::PimHaltOp>(block->back()))
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pim::PimHaltOp::create(builder, coreBatchOp.getLoc());
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scalarizeBatchOpsInCore(scalarCore, laneCount, lane);
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return callback(scalarCore);
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}
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LogicalResult withScalarCoreFromBatchLane(pim::PimCoreBatchOp coreBatchOp,
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unsigned lane,
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llvm::function_ref<LogicalResult(pim::PimCoreOp)> callback) {
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return withScalarCoreFromBatchLanes(coreBatchOp, ArrayRef<unsigned> {lane}, callback);
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}
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} // namespace onnx_mlir
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