add PIM accelerator

src/PIM/Compiler/PimCompilerOptions.cpp

@@ -0,0 +1,56 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//===------------------------- PimCompilerOptions.cpp --------------------===//
+//
+// Copyright 2022 The IBM Research Authors.
+//
+// =============================================================================
+//
+// Compiler Options for PIM
+//
+//===----------------------------------------------------------------------===//
+#include "src/Accelerators/PIM/Compiler/PimCompilerOptions.hpp"
+
+#define DEBUG_TYPE "PimCompilerOptions"
+
+namespace onnx_mlir {
+
+llvm::cl::opt<PimEmissionTargetType> pimEmissionTarget(
+    llvm::cl::desc("[Optional] Choose PIM-related target to emit "
+                   "(once selected it will cancel the other targets):"),
+    llvm::cl::values(clEnumVal(EmitSpatial, "Lower model to spatial IR")),
+    llvm::cl::values(clEnumVal(EmitPim, "Lower model to PIM IR")),
+    llvm::cl::values(
+        clEnumVal(EmitPimBufferized, "Lower model to PIM IR and bufferize it")),
+    llvm::cl::values(clEnumVal(EmitPimCodegen, "Lower model to PIM IR and "
+                                               "generate code for PIM")),
+    llvm::cl::init(EmitPimCodegen), llvm::cl::cat(OnnxMlirOptions));
+
+llvm::cl::opt<bool> pimOnlyCodegen("pim-only-codegen",
+    llvm::cl::desc("Only generate code for PIM (assume input is already in "
+                   "bufferized PIM IR)"),
+    llvm::cl::init(false), llvm::cl::cat(OnnxMlirOptions));
+
+llvm::cl::opt<bool> useExperimentalConvImpl("use-experimental-conv-impl",
+    llvm::cl::desc("Use experimental implementation for convolution"),
+    llvm::cl::init(false), llvm::cl::cat(OnnxMlirOptions));
+
+llvm::cl::opt<size_t> crossbarSize("crossbar-size",
+    llvm::cl::desc("Width and heigth of a single crossbar"), llvm::cl::init(2));
+
+llvm::cl::opt<size_t> crossbarCountInCore("crossbar-count",
+    llvm::cl::desc("Number of crossbars in each core"), llvm::cl::init(2));
+
+llvm::cl::opt<long> coresCount("core-count",
+    llvm::cl::desc("Number of cores in the chip. `-1` to use the minimum "
+                   "amount of cores."),
+    llvm::cl::init(-1));
+
+llvm::cl::opt<bool> ignoreConcatError("ignore-concat-error",
+    llvm::cl::desc(
+        "Ignore ConcatOp corner case: do not assert and do a simplification"),
+    llvm::cl::init(false));
+
+} // namespace onnx_mlir