diff --git a/backend-simulators/pim/pim-simulator/src/lib/pimcore.rs b/backend-simulators/pim/pim-simulator/src/lib/pimcore.rs index 1361477..2553756 100644 --- a/backend-simulators/pim/pim-simulator/src/lib/pimcore.rs +++ b/backend-simulators/pim/pim-simulator/src/lib/pimcore.rs @@ -19,19 +19,19 @@ pub mod utility; #[derive(Debug, Clone)] pub struct CoreInstructionsBuilder { - core_instructions: Vec, + core_instructions: Vec, } impl CoreInstructionsBuilder { pub fn new(size: usize) -> Self { let mut core_instructions = Vec::with_capacity(size); for _ in 0..=size { - core_instructions.push(CoreInstruction::empty()); + core_instructions.push(CoreInstructions::empty()); } Self { core_instructions } } - pub fn build(self) -> Vec { + pub fn build(self) -> Vec { self.core_instructions } @@ -43,12 +43,12 @@ impl CoreInstructionsBuilder { } #[derive(Debug, Clone)] -pub struct CoreInstruction { +pub struct CoreInstructions { instructions: Instructions, program_counter: usize, } -impl CoreInstruction { +impl CoreInstructions { fn new(instructions: Instructions, program_counter: usize) -> Self { Self { instructions, @@ -64,9 +64,9 @@ impl CoreInstruction { } } -impl From for CoreInstruction { +impl From for CoreInstructions { fn from(value: Instructions) -> Self { - CoreInstruction { + CoreInstructions { instructions: value, program_counter: 0, } @@ -76,27 +76,27 @@ impl From for CoreInstruction { #[derive(Debug, Clone)] pub struct Executable<'a> { cpu: CPU<'a>, - core_instructions: Vec, + core_instructions: Vec, send_recv: SendRecv, } -fn print_status(core_instructions: &[CoreInstruction]) { - for (i, core_instruction) in core_instructions.iter().enumerate() { - println!( - "Core {} : {}% ({}/{}) ", - i, - core_instruction.program_counter as f32 / core_instruction.instructions.len() as f32 - * 100.0, - core_instruction.program_counter, - core_instruction.instructions.len() - ) +fn print_status(core_instructions: &[CoreInstructions]) { + let mut tot_instructions = 0; + let mut progress = 0; + for core_instruction in core_instructions.iter() { + tot_instructions += core_instruction.instructions.len(); + progress += core_instruction.program_counter; } - - println!(); + println!( + "Progress: {}% ({}/{}) ", + progress as f32 / tot_instructions as f32 * 100.0, + progress, + tot_instructions + ); } impl<'a> Executable<'a> { - pub fn new(cpu: CPU<'a>, core_instructions: Vec) -> Executable<'a> { + pub fn new(cpu: CPU<'a>, core_instructions: Vec) -> Executable<'a> { let num_core = cpu.num_core(); let send_recv = SendRecv::new(num_core); assert_eq!( @@ -117,21 +117,21 @@ impl<'a> Executable<'a> { { let Self { cpu, - core_instructions, + core_instructions: cores_instructions, send_recv, } = self; let mut cpu_progressed = 0; let max_core = cpu.num_core(); - let mut index_unit = 0; - let now = SystemTime::now(); + let mut cpu_index = 0; + let mut now = SystemTime::now(); while (cpu_progressed > -2) { let mut core_result = InstructionStatus::Completed; while core_result.is_completed() - && let Some(core_instruction) = core_instructions.get_mut(index_unit) + && let Some(core_instruction) = cores_instructions.get_mut(cpu_index) { core_result = InstructionStatus::NotExecuted; - let CoreInstruction { + let CoreInstructions { instructions, program_counter, } = core_instruction; @@ -144,21 +144,31 @@ impl<'a> Executable<'a> { cpu_progressed = 0; *program_counter += 1; } + if (now.elapsed().unwrap() > Duration::from_secs(1)) { + print_status(&cores_instructions); + now = SystemTime::now(); + } } - if handle_send_recv(cpu, core_instructions, send_recv, core_result) { - cpu_progressed = 0; - } - handle_wait_sync(cpu, core_instructions, core_result); - index_unit = if index_unit + 1 >= max_core { - cpu_progressed -= 1; - 0 - } else { - index_unit + 1 - }; - if (now.elapsed().unwrap() > Duration::from_secs(1)) { - print_status(&core_instructions); + handle_wait_sync(cpu, cores_instructions, core_result); + match handle_send_recv(cpu, cores_instructions, send_recv, core_result) { + (true, other_cpu_index) => { + cpu_progressed = 0; + cpu_index = other_cpu_index; + } + (false, 0) => { + cpu_index = if cpu_index + 1 >= cores_instructions.len() { + cpu_progressed -= 1; + 0 + } else { + cpu_index + 1 + }; + } + (false, other_cpu_index) => { + cpu_index = other_cpu_index; + } } } + print_status(cores_instructions); } pub fn cpu(&self) -> &CPU<'a> { @@ -182,7 +192,7 @@ impl<'a> Executable<'a> { fn handle_wait_sync<'a, 'b, 'c>( cpu: &'b mut CPU<'a>, - core_instructions: &'c mut [CoreInstruction], + core_instructions: &'c mut [CoreInstructions], core_result: InstructionStatus, ) where 'a: 'b, diff --git a/backend-simulators/pim/pim-simulator/src/lib/send_recv.rs b/backend-simulators/pim/pim-simulator/src/lib/send_recv.rs index 6f68e0a..d33a0e8 100644 --- a/backend-simulators/pim/pim-simulator/src/lib/send_recv.rs +++ b/backend-simulators/pim/pim-simulator/src/lib/send_recv.rs @@ -1,7 +1,7 @@ use anyhow::Context; use crate::{ - CoreInstruction, cpu::CPU, instruction_set::InstructionStatus, tracing::TRACER, + CoreInstructions, cpu::CPU, instruction_set::InstructionStatus, tracing::TRACER, utility::add_offset_rd, }; @@ -43,14 +43,14 @@ impl SendRecv { pub fn handle_send_recv<'a, 'b >( cpu: &'b mut CPU<'a>, - core_instructions: & mut [CoreInstruction], + core_instructions: & mut [CoreInstructions], send_recv: & mut SendRecv, core_result: InstructionStatus, -) -> bool +) -> (bool, usize) where 'a : 'b { let transfer_memory = |cpu: &'b mut CPU<'a>, - core_instructions: & mut [CoreInstruction], + core_instructions: & mut [CoreInstructions], sender: Option, receiver: Option| { if let Some(sender) = sender @@ -119,7 +119,7 @@ where 'a : 'b send_recv.sending[sender] = None; send_recv.receiving[receiver] = None; } - transfered + (transfered, receiver) } InstructionStatus::Reciving(instruction_data) => { let (core_idx, imm_core) = instruction_data.get_core_immcore(); @@ -148,8 +148,8 @@ where 'a : 'b send_recv.sending[sender] = None; send_recv.receiving[receiver] = None; } - transfered + (transfered, sender) } - _ => false, + _ => (false, 0), } }