This commit is contained in:
@@ -26,6 +26,7 @@
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#include "src/Accelerators/PIM/Conversion/ONNXToSpatial/Common/Common.hpp"
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#include "src/Accelerators/PIM/Conversion/ONNXToSpatial/CompileTime.hpp"
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#include "src/Accelerators/PIM/Conversion/ONNXToSpatial/PlanLowering.hpp"
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#include "src/Accelerators/PIM/Conversion/ONNXToSpatial/Patterns/Math/ConvGeometry.hpp"
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#include "src/Accelerators/PIM/Dialect/Spatial/SpatialOps.hpp"
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#include "src/Dialect/ONNX/ONNXOps.hpp"
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@@ -42,59 +43,6 @@ struct ConvToGemm : OpConversionPattern<ONNXConvOp> {
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ConversionPatternRewriter& rewriter) const override;
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};
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struct ConvLoweringState {
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Value x;
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Value w;
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Value b;
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RankedTensorType xType;
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RankedTensorType wType;
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RankedTensorType outType;
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int64_t batchSize;
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int64_t numChannelsIn;
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int64_t xHeight;
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int64_t xWidth;
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int64_t numChannelsOut;
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int64_t wHeight;
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int64_t wWidth;
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int64_t outHeight;
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int64_t outWidth;
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int64_t group;
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int64_t numChannelsInPerGroup;
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int64_t numChannelsOutPerGroup;
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int64_t padHeightBegin;
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int64_t padHeightEnd;
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int64_t padWidthBegin;
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int64_t padWidthEnd;
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int64_t strideHeight;
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int64_t strideWidth;
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int64_t dilationHeight;
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int64_t dilationWidth;
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bool hasBias;
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};
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struct ConvGeometry {
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int64_t batchSize;
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int64_t numChannelsIn;
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int64_t xHeight;
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int64_t xWidth;
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int64_t numChannelsOut;
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int64_t wHeight;
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int64_t wWidth;
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int64_t outHeight;
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int64_t outWidth;
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int64_t group;
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int64_t numChannelsInPerGroup;
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int64_t numChannelsOutPerGroup;
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int64_t k;
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int64_t c;
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int64_t p;
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int64_t xbarSize;
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int64_t pack;
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uint64_t im2colElements;
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bool hasBias;
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bool isDepthwise;
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};
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struct ConvLoweringDecision {
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PimConvLoweringType strategy;
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std::string reason;
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@@ -108,19 +56,6 @@ struct PreparedConvInput {
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RankedTensorType type;
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};
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struct RowInterval {
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int64_t begin = 0;
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int64_t end = 0;
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};
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struct ConvRowDemand {
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RowInterval outputRows;
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RowInterval neededInputRows;
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RowInterval acquiredInputRows;
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int64_t topHaloRows = 0;
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int64_t bottomHaloRows = 0;
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};
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struct ConvStrategyEstimate {
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uint64_t estimatedMvmCount = 0;
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uint64_t estimatedReductionVAddCount = 0;
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@@ -291,9 +226,6 @@ static FailureOr<Value> createRowStripPackedRows(Value rows,
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PatternRewriter& rewriter,
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Location loc);
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static bool
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isDepthwiseConv(int64_t group, int64_t numChannelsIn, int64_t numChannelsOut, int64_t numChannelsInPerGroup);
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static uint64_t chooseStreamChunkPositions(const ConvGeometry& geo, int64_t packFactor);
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static FailureOr<ConvLoweringState> analyzeConvLoweringState(ONNXConvOp convOp, Value x, Value w, Value b);
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static StringRef stringifyDistributedConvBarrierKind(DistributedConvBarrierKind kind) {
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@@ -391,34 +323,6 @@ static ConvStrategyEstimate estimateConvStrategy(const ConvGeometry& geo,
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return estimate;
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}
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static ConvGeometry buildConvGeometry(const ConvLoweringState& state) {
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ConvGeometry geo {
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state.batchSize,
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state.numChannelsIn,
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state.xHeight,
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state.xWidth,
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state.numChannelsOut,
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state.wHeight,
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state.wWidth,
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state.outHeight,
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state.outWidth,
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state.group,
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state.numChannelsInPerGroup,
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state.numChannelsOutPerGroup,
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state.numChannelsInPerGroup * state.wHeight * state.wWidth,
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state.numChannelsOutPerGroup,
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state.batchSize * state.outHeight * state.outWidth,
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static_cast<int64_t>(crossbarSize.getValue()),
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1,
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0,
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state.hasBias,
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isDepthwiseConv(state.group, state.numChannelsIn, state.numChannelsOut, state.numChannelsInPerGroup),
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};
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geo.pack = std::max<int64_t>(1, geo.xbarSize / std::max<int64_t>(geo.k, geo.c));
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geo.im2colElements = static_cast<uint64_t>(std::max<int64_t>(0, geo.p)) * static_cast<uint64_t>(std::max<int64_t>(0, geo.k));
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return geo;
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}
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static std::string formatShape(ArrayRef<int64_t> dims) {
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std::string text;
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llvm::raw_string_ostream os(text);
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@@ -563,36 +467,10 @@ classifyDistributedBinaryConsumer(Operation* user,
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return std::nullopt;
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}
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static RowInterval computeConvInputRowsForOutputRows(RowInterval outputRows,
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int64_t inputHeight,
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int64_t kernelH,
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int64_t strideH,
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int64_t dilationH,
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int64_t padTop) {
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const int64_t rawBegin = outputRows.begin * strideH - padTop;
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const int64_t rawEnd = (outputRows.end - 1) * strideH - padTop + dilationH * (kernelH - 1) + 1;
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return {std::max<int64_t>(0, rawBegin), std::min<int64_t>(inputHeight, rawEnd)};
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}
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static bool covers(RowInterval acquired, RowInterval needed) {
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return acquired.begin <= needed.begin && acquired.end >= needed.end;
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}
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static ConvRowDemand buildConvRowDemand(RowInterval outputRows, const ConvLoweringState& state) {
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const int64_t rawBegin = outputRows.begin * state.strideHeight - state.padHeightBegin;
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const int64_t rawEnd =
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(outputRows.end - 1) * state.strideHeight - state.padHeightBegin + state.dilationHeight * (state.wHeight - 1) + 1;
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RowInterval neededInputRows = computeConvInputRowsForOutputRows(
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outputRows, state.xHeight, state.wHeight, state.strideHeight, state.dilationHeight, state.padHeightBegin);
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ConvRowDemand demand;
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demand.outputRows = outputRows;
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demand.neededInputRows = neededInputRows;
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demand.acquiredInputRows = neededInputRows;
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demand.topHaloRows = std::max<int64_t>(0, -rawBegin);
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demand.bottomHaloRows = std::max<int64_t>(0, rawEnd - state.xHeight);
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return demand;
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}
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static bool canConsumeRowStripHwcInput(const ConvLoweringState& state, StringRef& failureReason) {
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if (state.batchSize != 1) {
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failureReason = "unsupported_batch";
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@@ -1250,19 +1128,6 @@ static void reportConvLoweringDecision(ONNXConvOp convOp,
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rewriteConvLoweringReport(reportEntries);
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}
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static uint64_t chooseStreamChunkPositions(const ConvGeometry& geo, int64_t packFactor) {
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const uint64_t patchElements = static_cast<uint64_t>(std::max<int64_t>(1, geo.k));
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uint64_t chunkPositions = std::max<uint64_t>(1, pimConvIm2colMaxElements / patchElements);
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chunkPositions = std::min<uint64_t>(chunkPositions, static_cast<uint64_t>(std::max<int64_t>(1, geo.p)));
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chunkPositions = std::min<uint64_t>(chunkPositions, std::max<uint64_t>(1, pimConvStreamChunkPositions));
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if (packFactor > 1 && chunkPositions > static_cast<uint64_t>(packFactor)) {
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chunkPositions -= chunkPositions % static_cast<uint64_t>(packFactor);
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chunkPositions = std::max<uint64_t>(chunkPositions, static_cast<uint64_t>(packFactor));
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}
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return std::max<uint64_t>(1, chunkPositions);
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}
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static Value expandBiasIfNeeded(Value bias, PatternRewriter& rewriter, Location loc) {
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auto biasType = cast<RankedTensorType>(bias.getType());
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if (biasType.getRank() != 1)
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@@ -1278,11 +1143,6 @@ static Value expandBiasIfNeeded(Value bias, PatternRewriter& rewriter, Location
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});
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}
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static bool
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isDepthwiseConv(int64_t group, int64_t numChannelsIn, int64_t numChannelsOut, int64_t numChannelsInPerGroup) {
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return group == numChannelsIn && numChannelsInPerGroup == 1 && numChannelsOut % group == 0;
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}
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static int64_t findLargestDivisorAtMost(int64_t value, int64_t limit) {
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assert(value > 0 && "expected positive value");
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limit = std::min(value, limit);
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@@ -0,0 +1,77 @@
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#include "ConvGeometry.hpp"
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#include <algorithm>
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#include "src/Accelerators/PIM/Common/IR/ShapeUtils.hpp"
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#include "src/Accelerators/PIM/Compiler/PimCompilerOptions.hpp"
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namespace onnx_mlir {
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bool isDepthwiseConv(int64_t group, int64_t numChannelsIn, int64_t numChannelsOut, int64_t numChannelsInPerGroup) {
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return group == numChannelsIn && numChannelsInPerGroup == 1 && numChannelsOut % group == 0;
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}
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ConvGeometry buildConvGeometry(const ConvLoweringState& state) {
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ConvGeometry geo {
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state.batchSize,
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state.numChannelsIn,
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state.xHeight,
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state.xWidth,
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state.numChannelsOut,
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state.wHeight,
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state.wWidth,
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state.outHeight,
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state.outWidth,
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state.group,
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state.numChannelsInPerGroup,
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state.numChannelsOutPerGroup,
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state.numChannelsInPerGroup * state.wHeight * state.wWidth,
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state.numChannelsOutPerGroup,
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state.batchSize * state.outHeight * state.outWidth,
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static_cast<int64_t>(crossbarSize.getValue()),
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1,
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0,
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state.hasBias,
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isDepthwiseConv(state.group, state.numChannelsIn, state.numChannelsOut, state.numChannelsInPerGroup),
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};
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geo.pack = std::max<int64_t>(1, geo.xbarSize / std::max<int64_t>(geo.k, geo.c));
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geo.im2colElements = static_cast<uint64_t>(std::max<int64_t>(0, geo.p)) * static_cast<uint64_t>(std::max<int64_t>(0, geo.k));
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return geo;
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}
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uint64_t chooseStreamChunkPositions(const ConvGeometry& geo, int64_t packFactor) {
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const uint64_t patchElements = static_cast<uint64_t>(std::max<int64_t>(1, geo.k));
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uint64_t chunkPositions = std::max<uint64_t>(1, pimConvIm2colMaxElements / patchElements);
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chunkPositions = std::min<uint64_t>(chunkPositions, static_cast<uint64_t>(std::max<int64_t>(1, geo.p)));
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chunkPositions = std::min<uint64_t>(chunkPositions, std::max<uint64_t>(1, pimConvStreamChunkPositions));
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if (packFactor > 1 && chunkPositions > static_cast<uint64_t>(packFactor)) {
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chunkPositions -= chunkPositions % static_cast<uint64_t>(packFactor);
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chunkPositions = std::max<uint64_t>(chunkPositions, static_cast<uint64_t>(packFactor));
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}
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return std::max<uint64_t>(1, chunkPositions);
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}
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RowInterval computeConvInputRowsForOutputRows(RowInterval outputRows, const ConvLoweringState& state) {
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const int64_t rawBegin = outputRows.begin * state.strideHeight - state.padHeightBegin;
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const int64_t rawEnd =
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(outputRows.end - 1) * state.strideHeight - state.padHeightBegin + state.dilationHeight * (state.wHeight - 1) + 1;
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return {std::max<int64_t>(0, rawBegin), std::min<int64_t>(state.xHeight, rawEnd)};
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}
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ConvRowDemand buildConvRowDemand(RowInterval outputRows, const ConvLoweringState& state) {
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ConvRowDemand demand;
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demand.outputRows = outputRows;
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demand.neededInputRows = computeConvInputRowsForOutputRows(outputRows, state);
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demand.acquiredInputRows = demand.neededInputRows;
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const int64_t rawBegin = outputRows.begin * state.strideHeight - state.padHeightBegin;
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const int64_t rawEnd =
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(outputRows.end - 1) * state.strideHeight - state.padHeightBegin + state.dilationHeight * (state.wHeight - 1) + 1;
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demand.topHaloRows = std::max<int64_t>(0, -rawBegin);
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demand.bottomHaloRows = std::max<int64_t>(0, rawEnd - state.xHeight);
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demand.acquiredInputRows = demand.neededInputRows;
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return demand;
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}
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} // namespace onnx_mlir
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@@ -0,0 +1,86 @@
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#pragma once
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#include "mlir/IR/BuiltinTypes.h"
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#include "mlir/IR/Value.h"
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#include <cstdint>
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namespace onnx_mlir {
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struct ConvLoweringState {
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mlir::Value x;
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mlir::Value w;
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mlir::Value b;
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mlir::RankedTensorType xType;
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mlir::RankedTensorType wType;
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mlir::RankedTensorType outType;
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int64_t batchSize;
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int64_t numChannelsIn;
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int64_t xHeight;
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int64_t xWidth;
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int64_t numChannelsOut;
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int64_t wHeight;
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int64_t wWidth;
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int64_t outHeight;
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int64_t outWidth;
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int64_t group;
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int64_t numChannelsInPerGroup;
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int64_t numChannelsOutPerGroup;
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int64_t padHeightBegin;
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int64_t padHeightEnd;
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int64_t padWidthBegin;
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int64_t padWidthEnd;
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int64_t strideHeight;
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int64_t strideWidth;
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int64_t dilationHeight;
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int64_t dilationWidth;
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bool hasBias;
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};
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struct ConvGeometry {
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int64_t batchSize;
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int64_t numChannelsIn;
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int64_t xHeight;
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int64_t xWidth;
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int64_t numChannelsOut;
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int64_t wHeight;
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int64_t wWidth;
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int64_t outHeight;
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int64_t outWidth;
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int64_t group;
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int64_t numChannelsInPerGroup;
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int64_t numChannelsOutPerGroup;
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int64_t k;
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int64_t c;
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int64_t p;
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int64_t xbarSize;
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int64_t pack;
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uint64_t im2colElements;
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bool hasBias;
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bool isDepthwise;
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};
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struct RowInterval {
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int64_t begin = 0;
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int64_t end = 0;
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};
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struct ConvRowDemand {
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RowInterval outputRows;
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RowInterval neededInputRows;
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RowInterval acquiredInputRows;
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int64_t topHaloRows = 0;
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int64_t bottomHaloRows = 0;
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};
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bool isDepthwiseConv(int64_t group, int64_t numChannelsIn, int64_t numChannelsOut, int64_t numChannelsInPerGroup);
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ConvGeometry buildConvGeometry(const ConvLoweringState& state);
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uint64_t chooseStreamChunkPositions(const ConvGeometry& geo, int64_t packFactor);
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RowInterval computeConvInputRowsForOutputRows(RowInterval outputRows, const ConvLoweringState& state);
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ConvRowDemand buildConvRowDemand(RowInterval outputRows, const ConvLoweringState& state);
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} // namespace onnx_mlir
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@@ -87,28 +87,6 @@ static Value createGemmBatchHOffset(Value lane,
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rewriter.getInsertionBlock()->getParentOp());
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}
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static Value
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createZeroPaddedTensor(Value value, RankedTensorType resultType, ConversionPatternRewriter& rewriter, Location loc) {
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auto sourceType = cast<RankedTensorType>(value.getType());
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SmallVector<OpFoldResult> lowPads(sourceType.getRank(), rewriter.getIndexAttr(0));
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SmallVector<OpFoldResult> highPads;
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highPads.reserve(sourceType.getRank());
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for (auto [sourceDim, resultDim] : llvm::zip(sourceType.getShape(), resultType.getShape()))
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highPads.push_back(rewriter.getIndexAttr(resultDim - sourceDim));
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auto padOp = tensor::PadOp::create(rewriter, loc, resultType, value, lowPads, highPads);
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auto* padBlock = new Block();
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for (int64_t i = 0; i < sourceType.getRank(); ++i)
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padBlock->addArgument(rewriter.getIndexType(), loc);
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padOp.getRegion().push_back(padBlock);
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rewriter.setInsertionPointToStart(padBlock);
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auto zero = getOrCreateConstant(
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rewriter, padOp.getOperation(), rewriter.getZeroAttr(sourceType.getElementType()), sourceType.getElementType());
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tensor::YieldOp::create(rewriter, loc, zero);
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rewriter.setInsertionPointAfter(padOp);
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return padOp.getResult();
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}
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static FailureOr<Value> materializePaddedConstantMatrix(Value value,
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RankedTensorType resultType,
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ConversionPatternRewriter& rewriter,
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@@ -232,22 +210,6 @@ static Value extractATile(
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return tensor::ExtractSliceOp::create(rewriter, loc, aTileType, a, offsets, sizes, strides).getResult();
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}
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static Value createPaddedInputCompute(Value input,
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RankedTensorType paddedInputType,
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ConversionPatternRewriter& rewriter,
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Location loc) {
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auto inputType = cast<RankedTensorType>(input.getType());
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if (inputType == paddedInputType)
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return input;
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auto computeOp = createSpatCompute<1>(rewriter, loc, TypeRange {paddedInputType}, {}, input, [&](Value computeInput) {
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Value paddedInput = createZeroPaddedTensor(computeInput, paddedInputType, rewriter, loc);
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spatial::SpatYieldOp::create(rewriter, loc, paddedInput);
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});
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return computeOp.getResult(0);
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}
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static FailureOr<spatial::SpatComputeBatch> createVmmBatch(Value a,
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Value b,
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RankedTensorType aType,
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@@ -255,42 +255,6 @@ static Value transposeLastTwoDims(Value value, PatternRewriter& rewriter, Locati
|
||||
return createONNXTranspose(resultType, {0, 2, 1});
|
||||
}
|
||||
|
||||
static Value createZeroPaddedTensor(Value value, RankedTensorType resultType, PatternRewriter& rewriter, Location loc) {
|
||||
auto sourceType = cast<RankedTensorType>(value.getType());
|
||||
SmallVector<OpFoldResult> lowPads(sourceType.getRank(), rewriter.getIndexAttr(0));
|
||||
SmallVector<OpFoldResult> highPads;
|
||||
highPads.reserve(sourceType.getRank());
|
||||
for (auto [sourceDim, resultDim] : llvm::zip(sourceType.getShape(), resultType.getShape()))
|
||||
highPads.push_back(rewriter.getIndexAttr(resultDim - sourceDim));
|
||||
|
||||
auto padOp = tensor::PadOp::create(rewriter, loc, resultType, value, lowPads, highPads);
|
||||
auto* padBlock = new Block();
|
||||
for (int64_t i = 0; i < sourceType.getRank(); ++i)
|
||||
padBlock->addArgument(rewriter.getIndexType(), loc);
|
||||
padOp.getRegion().push_back(padBlock);
|
||||
rewriter.setInsertionPointToStart(padBlock);
|
||||
auto zero = getOrCreateConstant(
|
||||
rewriter, padOp.getOperation(), rewriter.getZeroAttr(sourceType.getElementType()), sourceType.getElementType());
|
||||
tensor::YieldOp::create(rewriter, loc, zero);
|
||||
rewriter.setInsertionPointAfter(padOp);
|
||||
return padOp.getResult();
|
||||
}
|
||||
|
||||
static Value createPaddedBatchedInputCompute(Value input,
|
||||
RankedTensorType paddedInputType,
|
||||
PatternRewriter& rewriter,
|
||||
Location loc) {
|
||||
auto inputType = cast<RankedTensorType>(input.getType());
|
||||
if (inputType == paddedInputType)
|
||||
return input;
|
||||
|
||||
auto computeOp = createSpatCompute<1>(rewriter, loc, TypeRange {paddedInputType}, {}, input, [&](Value computeInput) {
|
||||
Value paddedInput = createZeroPaddedTensor(computeInput, paddedInputType, rewriter, loc);
|
||||
spatial::SpatYieldOp::create(rewriter, loc, paddedInput);
|
||||
});
|
||||
return computeOp.getResult(0);
|
||||
}
|
||||
|
||||
static FailureOr<Value> materializePaddedBatchedWeight(Value value,
|
||||
ArrayRef<int64_t> sourceBatchShape,
|
||||
ArrayRef<int64_t> targetBatchShape,
|
||||
@@ -1055,7 +1019,7 @@ struct MatMulBatchedToSpatialComputes : OpRewritePattern<ONNXMatMulOp> {
|
||||
auto paddedRhs =
|
||||
materializePaddedBatchedWeight(plan.rhs, plan.rhsBatchShape, plan.outputBatchShape, paddedRhsType, rewriter);
|
||||
if (succeeded(paddedRhs)) {
|
||||
Value paddedLhs = createPaddedBatchedInputCompute(plan.lhs, paddedLhsType, rewriter, loc);
|
||||
Value paddedLhs = createPaddedInputCompute(plan.lhs, paddedLhsType, rewriter, loc);
|
||||
const int64_t laneCount = plan.batch * plan.m * numKSlices * numOutHSlices;
|
||||
auto partialPiecesType = RankedTensorType::get({laneCount, static_cast<int64_t>(crossbarSize.getValue())},
|
||||
shapeInfo->outType.getElementType());
|
||||
|
||||
Reference in New Issue
Block a user