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pim-simulator dump inst function

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This commit is contained in:
ilgeco
2026-03-04 19:56:30 +01:00
parent 8ee1e5ece8
commit 91ef6d9bc3
2 changed files with 15 additions and 1 deletions
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4
backend-simulators/pim/pim-simulator/src/lib/instruction_set/mod.rs
View File

@@ -46,6 +46,10 @@ impl Instruction {
.with_context(|| format!("Error in core: {}", self.data.core_indx() - 1))
.unwrap()
}
pub(crate) fn dump(&self) {
eprintln!("\t{}", functor_to_name(self.functor as usize));
}
}
pub type Instructions = Vec<Instruction>;

12
backend-simulators/pim/pim-simulator/src/lib/pimcore.rs
View File

@@ -1,7 +1,7 @@
#![allow(unused)]
use crate::{
cpu::CPU, instruction_set::{Instruction, InstructionStatus, Instructions}, memory_manager::type_traits::TryToUsize, send_recv::{SendRecv, handle_send_recv}, tracing::TRACER
cpu::CPU, instruction_set::{Instruction, InstructionStatus, Instructions, isa::functor_to_name}, memory_manager::type_traits::TryToUsize, send_recv::{SendRecv, handle_send_recv}, tracing::TRACER
};
pub mod cpu;
pub mod instruction_set;
@@ -131,6 +131,16 @@ impl Executable {
pub fn cpu_mut(&mut self) -> &mut CPU {
&mut self.cpu
}
pub fn dump(&self) {
let core_instructions = &self.core_instructions;
for (i, core_instruction) in core_instructions.iter().enumerate() {
eprintln!("INST OF CORE {}:", i);
for inst in &core_instruction.instructions {
inst.dump();
}
}
}
}
fn handle_wait_sync(cpu: &mut CPU, core_instructions: &mut [CoreInstruction], core_result: InstructionStatus) {